The present invention relates to a partial one-shot electron beam exposure mask and a method of forming a partial one-shot electron beam exposure pattern.
In recent years, the density of integration of a semiconductor integrated circuit has been increasing. In case of dynamic random access memory, the density of integration of the integrated circuit has increased four times for every three years, for example, from 16 megabits of 0.5 micrometers in size, 64 megabits of 0.35 micrometers in size, to 256 megabits of 0.25 micrometers in size.
One gigabit dynamic random access memory scaled down to 0.16 micrometers is the memory in the next generation. However, the size of 0.16 micrometers is beyond the limitation of the resolution of the optical exposure. In order to further scale down the pattern, an electron beam exposure is available.
The available electron beam exposure is classified into a variable shaped beam method and cell projection method. In the variable shaped beam method, individual patterns are sequentially formed. In the cell projection method, a plurality of masks are prepared which have repeating patterns so that the mask is used for one-shot electron beam exposure to form the repeating pattern.
FIG. 1 is a plan view illustration of a mask to be used for a partial one-shot electron beam exposure. The partial one-shot electron beam exposure mask has a pattern of stripe-shaped opening portions 91. The partial one-shot electron beam exposure mask 90 is placed on a photo-resist film so that the electron beam is irradiated onto the partial one-shot electron beam exposure mask 90 whereby the photo-resist film is selectively exposed to the electron beams having passed through the openings 91 of the mask 90 to form a desired photo-resist pattern.
FIG. 2 is a view illustrative of sequential and repeating electron beam exposures by use of the partial one-shot electron beam exposure mask having the openings as a unit pattern. The partial one-shot electron beam exposure mask having the openings as a unit pattern is used repeatedly to carry out sequential electron beam exposures with displacements of the mask in lateral and vertical directions A and B.
FIG. 3 is a view illustrative of a photo-resist pattern obtained by the sequential electron beam exposures carried out by displacement of the mask in lateral and vertical directions "A" and "B". A unit pattern 92 is formed by a partial one-shot electron beam exposure by use of the partial one-shot electron beam exposure mask having the openings as a unit pattern. Boundaries of the partial one-shot electron beam exposure mask having been repeatedly used comprise opposite vertical boundary lines 95 and opposite lateral boundary lines 94. As a result of the sequential and repeated one-shot electron beam exposures by use of the mask, a photo-resist pattern 93 can be obtained.
For realizing the above sequential and repeating one-shot electron beam exposures, an accurate alignment of the partial one-shot electron beam exposures mask is essential. Actually, however, it is difficult to avoid some displacement of the mask over the photo-resist film.
FIGS. 4A and 4B illustrate a displacement of the one-shot electron beam exposure mask in sequential and repeating one-shot electron beam exposures and an influence of the displacement on the pattern formed by the mask. When the mask is aligned in the intermediate region, a downward displacement of the mask appears, whereby a gap 96 is formed between the top and intermediate regions whilst an overlap 97 is caused between the intermediate and bottom regions. The broken lines 95 represent the opposite lateral boundary lines 95 of the mask. As a result of the sequential and repeated one-shot electron beam exposures using the mask, photo-resist patterns are obtained which have pinched portions 98 at a position corresponding to the gap 96 and expanding portions 99 at a different position corresponding to the overlap 97. If the displacement of the mask is large, then a disconnection of the photo-resist pattern may appear. Also if the displacement of the mask is large, then extensively expanding portions of the adjacent photo-resist patterns may be made into contact with each other.
Japanese laid-open patent publication No.: 62-206829 suggests intentionally overlapping portions of the mask to avoid the disconnection of the photo-resist pattern.
Japanese laid-open patent publication No. 2-170411 suggests intentionally displacing in the vertical direction two adjacent photo-resist patterns relative to each other so that the extensively expanding portions of the adjacent photo-resist patterns are different in levels in the vertical direction as illustrated in FIG. 5 which is illustrative of a partial one-shot electron beam exposure mask for causing the intentional displacement in the vertical direction of the adjacent photo-resist patterns relative to each other. The partial one-shot electron beam exposure mask 100 has stripe-shaped openings 101 which are displaced in the vertical direction to each other.
Japanese laid-open patent publication No. 2-71509 discloses that the opposite ends of each stripe-shaped opening of the mask have smaller width portions than the line width of the stripe-shaped opening so that a double exposure is caused at the smaller width portions so as to suppress the variation in size of the photo-resist patterns.
For the foregoing prior art, it is, however, difficult to settle the problem with variation in size of the photo-resist patterns.
Considering the use of the partial one-shot mask 100 as illustrated in FIG. 5, a photo-resist pattern is obtained as illustrated in FIG. 6. FIG. 6 is a view illustrative of a positional relationship of pinched and expended portions of word lines prepared by the use of the partial one-shot exposure mask in relation to active regions on which elements are formed. Cross hatched portions represent the gate electrode of the field effect transistors. The width of the word line 2 over the active region 1 sets a gate length of the field effect transistor formed in the active region 1. If, for example, the expanding portion 104 is positioned in the active region 1, this means the gate length is longer than the predetermined gate length. If, however, the pinched portion 102 is positioned in the active region 1, then this means the gate length is shorter than the predetermined gate length. If neither one expanding portion nor the pinched portion is formed in the active region 1 and the width of the word line is just the predetermined value 103, this means that the gate length also has the predetermined value 103. Namely, some variation in gate length is unavailable. If the gate length is shortened, then the leakage of current of the transistor in OFF-state is increased. If, in contrast, the gate length is increased, then the channel resistance is increased whereby the ON-current of the transistor is reduced. As a result, the capability of writing into the memory cell is deteriorated. Such variation in characteristics of the memory cell transistor reduces the yield of the memory cell chip.
In case of the dynamic random access memory, a distance between the word line and the bit contact is narrower than a distance between the interconnections, for which reason the expanded portions of the word lines may approach or be made into contact with the bit contact whereby a short circuit is formed between the word line and the bit contact.
FIG. 7 is a plan view illustrative of a positional relationship between the expanded and pinched portions of the word lines and bit contact holes formed between the word lines. Even if, neither the expanded portion nor the pinched portion is formed in the active region 1, it is possible that the expanded portion 106 is formed adjacent to the bit contact hole 7 whereby a short circuit is formed between the word line and the bit contact. If, however, the pinched portion 102 is formed adjacent to the bit contact hole 7, then no problem is raised. If neither the expanded portion nor the pinched portion is formed adjacent to the bit contact hole 7 and the word line portion 105 adjacent to the bit contact hole 7 has a predetermined width, then there is no problem raised like the short circuit that is formed between the word line and the bit contact.
FIG. 8 is a fragmentary cross sectional elevation view illustrative of word lines and bit contact holes taken along an VIII--VIII line of FIG. 7.
A semiconductor substrate 100 has an isolation region 113 and an active region on which elements 1 are formed. Field oxide films 114 are selectively formed on the isolation region 113 to define the active region. Diffusion layers 111 are formed on the active region X. Word lines 2 are formed over the field oxide films 114. An inter-layer insulator 112 is formed over the word lines 2 and field oxide films 114 wherein the inter-layer insulator 112 has bit contact holes 7 which are positioned over the diffusion layers 111. The word lines 2 have the expanded portions adjacent to the bit contact holes 7, for which reason the word lines 2A illustrated in FIG. 8 are displaced to be shown on the side walls of the bit contact holes 7. If the bit contacts made of an electrically conductive material are formed in the bit contact holes 7, then the bit contacts contact the expanded portions 2A of the word lines 2 whereby the short circuits are formed between the bit contacts and the word lines. As a result, the yield of the chip decreases.
In the above circumstances, it had been required to develop a novel partial one-shot electron beam exposure mask and a method of forming a partial one-shot electron beam exposure pattern free from the above problems.